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/**
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* Marlin 3D Printer Firmware
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* Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/**
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* MarlinSerial.cpp - Hardware serial library for Wiring
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* Copyright (c) 2006 Nicholas Zambetti. All right reserved.
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*
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* Modified 23 November 2006 by David A. Mellis
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* Modified 28 September 2010 by Mark Sproul
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* Modified 14 February 2016 by Andreas Hardtung (added tx buffer)
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* Modified 01 October 2017 by Eduardo José Tagle (added XON/XOFF)
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* Modified 10 June 2018 by Eduardo José Tagle (See #10991)
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*/
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// Disable HardwareSerial.cpp to support chips without a UART (Attiny, etc.)
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#include "MarlinConfig.h"
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#if USE_MARLINSERIAL && (defined(UBRRH) || defined(UBRR0H) || defined(UBRR1H) || defined(UBRR2H) || defined(UBRR3H))
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#include "MarlinSerial.h"
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#include "Marlin.h"
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struct ring_buffer_r {
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unsigned char buffer[RX_BUFFER_SIZE];
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volatile ring_buffer_pos_t head, tail;
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};
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#if TX_BUFFER_SIZE > 0
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struct ring_buffer_t {
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unsigned char buffer[TX_BUFFER_SIZE];
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volatile uint8_t head, tail;
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};
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#endif
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#if UART_PRESENT(SERIAL_PORT)
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ring_buffer_r rx_buffer = { { 0 }, 0, 0 };
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#if TX_BUFFER_SIZE > 0
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ring_buffer_t tx_buffer = { { 0 }, 0, 0 };
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#endif
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static bool _written;
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#endif
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#if ENABLED(SERIAL_XON_XOFF)
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constexpr uint8_t XON_XOFF_CHAR_SENT = 0x80, // XON / XOFF Character was sent
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XON_XOFF_CHAR_MASK = 0x1F; // XON / XOFF character to send
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// XON / XOFF character definitions
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constexpr uint8_t XON_CHAR = 17, XOFF_CHAR = 19;
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uint8_t xon_xoff_state = XON_XOFF_CHAR_SENT | XON_CHAR;
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#endif
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#if ENABLED(SERIAL_STATS_DROPPED_RX)
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uint8_t rx_dropped_bytes = 0;
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#endif
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#if ENABLED(SERIAL_STATS_RX_BUFFER_OVERRUNS)
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uint8_t rx_buffer_overruns = 0;
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#endif
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#if ENABLED(SERIAL_STATS_RX_FRAMING_ERRORS)
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uint8_t rx_framing_errors = 0;
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#endif
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#if ENABLED(SERIAL_STATS_MAX_RX_QUEUED)
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ring_buffer_pos_t rx_max_enqueued = 0;
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#endif
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// A SW memory barrier, to ensure GCC does not overoptimize loops
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#define sw_barrier() asm volatile("": : :"memory");
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#if ENABLED(EMERGENCY_PARSER)
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#include "emergency_parser.h"
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#endif
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// "Atomically" read the RX head index value without disabling interrupts:
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// This MUST be called with RX interrupts enabled, and CAN'T be called
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// from the RX ISR itself!
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FORCE_INLINE ring_buffer_pos_t atomic_read_rx_head() {
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#if RX_BUFFER_SIZE > 256
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// Keep reading until 2 consecutive reads return the same value,
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// meaning there was no update in-between caused by an interrupt.
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// This works because serial RX interrupts happen at a slower rate
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// than successive reads of a variable, so 2 consecutive reads with
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// the same value means no interrupt updated it.
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ring_buffer_pos_t vold, vnew = rx_buffer.head;
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sw_barrier();
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do {
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vold = vnew;
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vnew = rx_buffer.head;
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sw_barrier();
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} while (vold != vnew);
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return vnew;
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#else
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// With an 8bit index, reads are always atomic. No need for special handling
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return rx_buffer.head;
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#endif
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}
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#if RX_BUFFER_SIZE > 256
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static volatile bool rx_tail_value_not_stable = false;
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static volatile uint16_t rx_tail_value_backup = 0;
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#endif
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// Set RX tail index, taking into account the RX ISR could interrupt
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// the write to this variable in the middle - So a backup strategy
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// is used to ensure reads of the correct values.
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// -Must NOT be called from the RX ISR -
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FORCE_INLINE void atomic_set_rx_tail(ring_buffer_pos_t value) {
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#if RX_BUFFER_SIZE > 256
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// Store the new value in the backup
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rx_tail_value_backup = value;
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sw_barrier();
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// Flag we are about to change the true value
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rx_tail_value_not_stable = true;
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sw_barrier();
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// Store the new value
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rx_buffer.tail = value;
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sw_barrier();
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// Signal the new value is completely stored into the value
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rx_tail_value_not_stable = false;
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sw_barrier();
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#else
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rx_buffer.tail = value;
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#endif
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}
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// Get the RX tail index, taking into account the read could be
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// interrupting in the middle of the update of that index value
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// -Called from the RX ISR -
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FORCE_INLINE ring_buffer_pos_t atomic_read_rx_tail() {
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#if RX_BUFFER_SIZE > 256
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// If the true index is being modified, return the backup value
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if (rx_tail_value_not_stable) return rx_tail_value_backup;
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#endif
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// The true index is stable, return it
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return rx_buffer.tail;
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}
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// (called with RX interrupts disabled)
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FORCE_INLINE void store_rxd_char() {
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// Get the tail - Nothing can alter its value while this ISR is executing, but there's
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// a chance that this ISR interrupted the main process while it was updating the index.
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// The backup mechanism ensures the correct value is always returned.
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const ring_buffer_pos_t t = atomic_read_rx_tail();
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// Get the head pointer - This ISR is the only one that modifies its value, so it's safe to read here
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ring_buffer_pos_t h = rx_buffer.head;
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// Get the next element
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ring_buffer_pos_t i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(RX_BUFFER_SIZE - 1);
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// This must read the M_UCSRxA register before reading the received byte to detect error causes
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#if ENABLED(SERIAL_STATS_DROPPED_RX)
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if (TEST(M_UCSRxA, M_DORx) && !++rx_dropped_bytes) --rx_dropped_bytes;
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#endif
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#if ENABLED(SERIAL_STATS_RX_BUFFER_OVERRUNS)
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if (TEST(M_UCSRxA, M_DORx) && !++rx_buffer_overruns) --rx_buffer_overruns;
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#endif
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#if ENABLED(SERIAL_STATS_RX_FRAMING_ERRORS)
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if (TEST(M_UCSRxA, M_FEx) && !++rx_framing_errors) --rx_framing_errors;
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#endif
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// Read the character from the USART
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uint8_t c = M_UDRx;
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#if ENABLED(EMERGENCY_PARSER)
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emergency_parser.update(c);
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#endif
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// If the character is to be stored at the index just before the tail
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// (such that the head would advance to the current tail), the RX FIFO is
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// full, so don't write the character or advance the head.
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if (i != t) {
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rx_buffer.buffer[h] = c;
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h = i;
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}
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#if ENABLED(SERIAL_STATS_DROPPED_RX)
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else if (!++rx_dropped_bytes) --rx_dropped_bytes;
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#endif
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#if ENABLED(SERIAL_STATS_MAX_RX_QUEUED)
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// Calculate count of bytes stored into the RX buffer
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const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(RX_BUFFER_SIZE - 1);
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// Keep track of the maximum count of enqueued bytes
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NOLESS(rx_max_enqueued, rx_count);
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#endif
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#if ENABLED(SERIAL_XON_XOFF)
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// If the last char that was sent was an XON
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if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XON_CHAR) {
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// Bytes stored into the RX buffer
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const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(RX_BUFFER_SIZE - 1);
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// If over 12.5% of RX buffer capacity, send XOFF before running out of
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// RX buffer space .. 325 bytes @ 250kbits/s needed to let the host react
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// and stop sending bytes. This translates to 13mS propagation time.
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if (rx_count >= (RX_BUFFER_SIZE) / 8) {
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// At this point, definitely no TX interrupt was executing, since the TX ISR can't be preempted.
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// Don't enable the TX interrupt here as a means to trigger the XOFF char, because if it happens
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// to be in the middle of trying to disable the RX interrupt in the main program, eventually the
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// enabling of the TX interrupt could be undone. The ONLY reliable thing this can do to ensure
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// the sending of the XOFF char is to send it HERE AND NOW.
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// About to send the XOFF char
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xon_xoff_state = XOFF_CHAR | XON_XOFF_CHAR_SENT;
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// Wait until the TX register becomes empty and send it - Here there could be a problem
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// - While waiting for the TX register to empty, the RX register could receive a new
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// character. This must also handle that situation!
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while (!TEST(M_UCSRxA, M_UDREx)) {
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if (TEST(M_UCSRxA,M_RXCx)) {
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// A char arrived while waiting for the TX buffer to be empty - Receive and process it!
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i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(RX_BUFFER_SIZE - 1);
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// Read the character from the USART
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c = M_UDRx;
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#if ENABLED(EMERGENCY_PARSER)
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emergency_parser.update(c);
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#endif
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// If the character is to be stored at the index just before the tail
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// (such that the head would advance to the current tail), the FIFO is
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// full, so don't write the character or advance the head.
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if (i != t) {
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rx_buffer.buffer[h] = c;
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h = i;
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}
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#if ENABLED(SERIAL_STATS_DROPPED_RX)
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else if (!++rx_dropped_bytes) --rx_dropped_bytes;
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#endif
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}
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sw_barrier();
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}
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M_UDRx = XOFF_CHAR;
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// Clear the TXC bit -- "can be cleared by writing a one to its bit
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// location". This makes sure flush() won't return until the bytes
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// actually got written
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SBI(M_UCSRxA, M_TXCx);
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// At this point there could be a race condition between the write() function
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// and this sending of the XOFF char. This interrupt could happen between the
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// wait to be empty TX buffer loop and the actual write of the character. Since
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// the TX buffer is full because it's sending the XOFF char, the only way to be
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// sure the write() function will succeed is to wait for the XOFF char to be
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// completely sent. Since an extra character could be received during the wait
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// it must also be handled!
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while (!TEST(M_UCSRxA, M_UDREx)) {
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if (TEST(M_UCSRxA,M_RXCx)) {
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// A char arrived while waiting for the TX buffer to be empty - Receive and process it!
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i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(RX_BUFFER_SIZE - 1);
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// Read the character from the USART
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c = M_UDRx;
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#if ENABLED(EMERGENCY_PARSER)
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emergency_parser.update(c);
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#endif
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// If the character is to be stored at the index just before the tail
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// (such that the head would advance to the current tail), the FIFO is
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// full, so don't write the character or advance the head.
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if (i != t) {
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rx_buffer.buffer[h] = c;
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h = i;
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}
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#if ENABLED(SERIAL_STATS_DROPPED_RX)
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else if (!++rx_dropped_bytes) --rx_dropped_bytes;
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#endif
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}
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sw_barrier();
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}
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// At this point everything is ready. The write() function won't
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// have any issues writing to the UART TX register if it needs to!
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}
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}
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#endif // SERIAL_XON_XOFF
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// Store the new head value - The main loop will retry until the value is stable
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rx_buffer.head = h;
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}
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#if TX_BUFFER_SIZE > 0
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// (called with TX irqs disabled)
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FORCE_INLINE void _tx_udr_empty_irq(void) {
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// Read positions
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uint8_t t = tx_buffer.tail;
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const uint8_t h = tx_buffer.head;
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#if ENABLED(SERIAL_XON_XOFF)
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// If an XON char is pending to be sent, do it now
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if (xon_xoff_state == XON_CHAR) {
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// Send the character
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M_UDRx = XON_CHAR;
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// clear the TXC bit -- "can be cleared by writing a one to its bit
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// location". This makes sure flush() won't return until the bytes
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332 |
// actually got written
|
|
|
333 |
SBI(M_UCSRxA, M_TXCx);
|
|
|
334 |
|
|
|
335 |
// Remember we sent it.
|
|
|
336 |
xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
|
|
|
337 |
|
|
|
338 |
// If nothing else to transmit, just disable TX interrupts.
|
|
|
339 |
if (h == t) CBI(M_UCSRxB, M_UDRIEx); // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
340 |
|
|
|
341 |
return;
|
|
|
342 |
}
|
|
|
343 |
#endif
|
|
|
344 |
|
|
|
345 |
// If nothing to transmit, just disable TX interrupts. This could
|
|
|
346 |
// happen as the result of the non atomicity of the disabling of RX
|
|
|
347 |
// interrupts that could end reenabling TX interrupts as a side effect.
|
|
|
348 |
if (h == t) {
|
|
|
349 |
CBI(M_UCSRxB, M_UDRIEx); // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
350 |
return;
|
|
|
351 |
}
|
|
|
352 |
|
|
|
353 |
// There is something to TX, Send the next byte
|
|
|
354 |
const uint8_t c = tx_buffer.buffer[t];
|
|
|
355 |
t = (t + 1) & (TX_BUFFER_SIZE - 1);
|
|
|
356 |
M_UDRx = c;
|
|
|
357 |
tx_buffer.tail = t;
|
|
|
358 |
|
|
|
359 |
// Clear the TXC bit (by writing a one to its bit location).
|
|
|
360 |
// Ensures flush() won't return until the bytes are actually written/
|
|
|
361 |
SBI(M_UCSRxA, M_TXCx);
|
|
|
362 |
|
|
|
363 |
// Disable interrupts if there is nothing to transmit following this byte
|
|
|
364 |
if (h == t) CBI(M_UCSRxB, M_UDRIEx); // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
365 |
}
|
|
|
366 |
|
|
|
367 |
#ifdef M_USARTx_UDRE_vect
|
|
|
368 |
ISR(M_USARTx_UDRE_vect) { _tx_udr_empty_irq(); }
|
|
|
369 |
#endif
|
|
|
370 |
|
|
|
371 |
#endif // TX_BUFFER_SIZE
|
|
|
372 |
|
|
|
373 |
#ifdef M_USARTx_RX_vect
|
|
|
374 |
ISR(M_USARTx_RX_vect) { store_rxd_char(); }
|
|
|
375 |
#endif
|
|
|
376 |
|
|
|
377 |
// Public Methods
|
|
|
378 |
|
|
|
379 |
void MarlinSerial::begin(const long baud) {
|
|
|
380 |
uint16_t baud_setting;
|
|
|
381 |
bool useU2X = true;
|
|
|
382 |
|
|
|
383 |
#if F_CPU == 16000000UL && SERIAL_PORT == 0
|
|
|
384 |
// Hard-coded exception for compatibility with the bootloader shipped
|
|
|
385 |
// with the Duemilanove and previous boards, and the firmware on the
|
|
|
386 |
// 8U2 on the Uno and Mega 2560.
|
|
|
387 |
if (baud == 57600) useU2X = false;
|
|
|
388 |
#endif
|
|
|
389 |
|
|
|
390 |
if (useU2X) {
|
|
|
391 |
M_UCSRxA = _BV(M_U2Xx);
|
|
|
392 |
baud_setting = (F_CPU / 4 / baud - 1) / 2;
|
|
|
393 |
}
|
|
|
394 |
else {
|
|
|
395 |
M_UCSRxA = 0;
|
|
|
396 |
baud_setting = (F_CPU / 8 / baud - 1) / 2;
|
|
|
397 |
}
|
|
|
398 |
|
|
|
399 |
// assign the baud_setting, a.k.a. ubbr (USART Baud Rate Register)
|
|
|
400 |
M_UBRRxH = baud_setting >> 8;
|
|
|
401 |
M_UBRRxL = baud_setting;
|
|
|
402 |
|
|
|
403 |
SBI(M_UCSRxB, M_RXENx);
|
|
|
404 |
SBI(M_UCSRxB, M_TXENx);
|
|
|
405 |
SBI(M_UCSRxB, M_RXCIEx);
|
|
|
406 |
#if TX_BUFFER_SIZE > 0
|
|
|
407 |
CBI(M_UCSRxB, M_UDRIEx);
|
|
|
408 |
#endif
|
|
|
409 |
_written = false;
|
|
|
410 |
}
|
|
|
411 |
|
|
|
412 |
void MarlinSerial::end() {
|
|
|
413 |
CBI(M_UCSRxB, M_RXENx);
|
|
|
414 |
CBI(M_UCSRxB, M_TXENx);
|
|
|
415 |
CBI(M_UCSRxB, M_RXCIEx);
|
|
|
416 |
CBI(M_UCSRxB, M_UDRIEx);
|
|
|
417 |
}
|
|
|
418 |
|
|
|
419 |
int MarlinSerial::peek(void) {
|
|
|
420 |
const ring_buffer_pos_t h = atomic_read_rx_head(), t = rx_buffer.tail;
|
|
|
421 |
return h == t ? -1 : rx_buffer.buffer[t];
|
|
|
422 |
}
|
|
|
423 |
|
|
|
424 |
int MarlinSerial::read(void) {
|
|
|
425 |
const ring_buffer_pos_t h = atomic_read_rx_head();
|
|
|
426 |
|
|
|
427 |
// Read the tail. Main thread owns it, so it is safe to directly read it
|
|
|
428 |
ring_buffer_pos_t t = rx_buffer.tail;
|
|
|
429 |
|
|
|
430 |
// If nothing to read, return now
|
|
|
431 |
if (h == t) return -1;
|
|
|
432 |
|
|
|
433 |
// Get the next char
|
|
|
434 |
const int v = rx_buffer.buffer[t];
|
|
|
435 |
t = (ring_buffer_pos_t)(t + 1) & (RX_BUFFER_SIZE - 1);
|
|
|
436 |
|
|
|
437 |
// Advance tail - Making sure the RX ISR will always get an stable value, even
|
|
|
438 |
// if it interrupts the writing of the value of that variable in the middle.
|
|
|
439 |
atomic_set_rx_tail(t);
|
|
|
440 |
|
|
|
441 |
#if ENABLED(SERIAL_XON_XOFF)
|
|
|
442 |
// If the XOFF char was sent, or about to be sent...
|
|
|
443 |
if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XOFF_CHAR) {
|
|
|
444 |
// Get count of bytes in the RX buffer
|
|
|
445 |
const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(RX_BUFFER_SIZE - 1);
|
|
|
446 |
if (rx_count < (RX_BUFFER_SIZE) / 10) {
|
|
|
447 |
#if TX_BUFFER_SIZE > 0
|
|
|
448 |
// Signal we want an XON character to be sent.
|
|
|
449 |
xon_xoff_state = XON_CHAR;
|
|
|
450 |
// Enable TX ISR. Non atomic, but it will eventually enable them
|
|
|
451 |
SBI(M_UCSRxB, M_UDRIEx);
|
|
|
452 |
#else
|
|
|
453 |
// If not using TX interrupts, we must send the XON char now
|
|
|
454 |
xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
|
|
|
455 |
while (!TEST(M_UCSRxA, M_UDREx)) sw_barrier();
|
|
|
456 |
M_UDRx = XON_CHAR;
|
|
|
457 |
#endif
|
|
|
458 |
}
|
|
|
459 |
}
|
|
|
460 |
#endif
|
|
|
461 |
|
|
|
462 |
return v;
|
|
|
463 |
}
|
|
|
464 |
|
|
|
465 |
ring_buffer_pos_t MarlinSerial::available(void) {
|
|
|
466 |
const ring_buffer_pos_t h = atomic_read_rx_head(), t = rx_buffer.tail;
|
|
|
467 |
return (ring_buffer_pos_t)(RX_BUFFER_SIZE + h - t) & (RX_BUFFER_SIZE - 1);
|
|
|
468 |
}
|
|
|
469 |
|
|
|
470 |
void MarlinSerial::flush(void) {
|
|
|
471 |
|
|
|
472 |
// Set the tail to the head:
|
|
|
473 |
// - Read the RX head index in a safe way. (See atomic_read_rx_head.)
|
|
|
474 |
// - Set the tail, making sure the RX ISR will always get a stable value, even
|
|
|
475 |
// if it interrupts the writing of the value of that variable in the middle.
|
|
|
476 |
atomic_set_rx_tail(atomic_read_rx_head());
|
|
|
477 |
|
|
|
478 |
#if ENABLED(SERIAL_XON_XOFF)
|
|
|
479 |
// If the XOFF char was sent, or about to be sent...
|
|
|
480 |
if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XOFF_CHAR) {
|
|
|
481 |
#if TX_BUFFER_SIZE > 0
|
|
|
482 |
// Signal we want an XON character to be sent.
|
|
|
483 |
xon_xoff_state = XON_CHAR;
|
|
|
484 |
// Enable TX ISR. Non atomic, but it will eventually enable it.
|
|
|
485 |
SBI(M_UCSRxB, M_UDRIEx);
|
|
|
486 |
#else
|
|
|
487 |
// If not using TX interrupts, we must send the XON char now
|
|
|
488 |
xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
|
|
|
489 |
while (!TEST(M_UCSRxA, M_UDREx)) sw_barrier();
|
|
|
490 |
M_UDRx = XON_CHAR;
|
|
|
491 |
#endif
|
|
|
492 |
}
|
|
|
493 |
#endif
|
|
|
494 |
}
|
|
|
495 |
|
|
|
496 |
#if TX_BUFFER_SIZE > 0
|
|
|
497 |
void MarlinSerial::write(const uint8_t c) {
|
|
|
498 |
_written = true;
|
|
|
499 |
|
|
|
500 |
// If the TX interrupts are disabled and the data register
|
|
|
501 |
// is empty, just write the byte to the data register and
|
|
|
502 |
// be done. This shortcut helps significantly improve the
|
|
|
503 |
// effective datarate at high (>500kbit/s) bitrates, where
|
|
|
504 |
// interrupt overhead becomes a slowdown.
|
|
|
505 |
// Yes, there is a race condition between the sending of the
|
|
|
506 |
// XOFF char at the RX ISR, but it is properly handled there
|
|
|
507 |
if (!TEST(M_UCSRxB, M_UDRIEx) && TEST(M_UCSRxA, M_UDREx)) {
|
|
|
508 |
M_UDRx = c;
|
|
|
509 |
|
|
|
510 |
// clear the TXC bit -- "can be cleared by writing a one to its bit
|
|
|
511 |
// location". This makes sure flush() won't return until the bytes
|
|
|
512 |
// actually got written
|
|
|
513 |
SBI(M_UCSRxA, M_TXCx);
|
|
|
514 |
return;
|
|
|
515 |
}
|
|
|
516 |
|
|
|
517 |
const uint8_t i = (tx_buffer.head + 1) & (TX_BUFFER_SIZE - 1);
|
|
|
518 |
|
|
|
519 |
// If global interrupts are disabled (as the result of being called from an ISR)...
|
|
|
520 |
if (!ISRS_ENABLED()) {
|
|
|
521 |
|
|
|
522 |
// Make room by polling if it is possible to transmit, and do so!
|
|
|
523 |
while (i == tx_buffer.tail) {
|
|
|
524 |
|
|
|
525 |
// If we can transmit another byte, do it.
|
|
|
526 |
if (TEST(M_UCSRxA, M_UDREx)) _tx_udr_empty_irq();
|
|
|
527 |
|
|
|
528 |
// Make sure compiler rereads tx_buffer.tail
|
|
|
529 |
sw_barrier();
|
|
|
530 |
}
|
|
|
531 |
}
|
|
|
532 |
else {
|
|
|
533 |
// Interrupts are enabled, just wait until there is space
|
|
|
534 |
while (i == tx_buffer.tail) { sw_barrier(); }
|
|
|
535 |
}
|
|
|
536 |
|
|
|
537 |
// Store new char. head is always safe to move
|
|
|
538 |
tx_buffer.buffer[tx_buffer.head] = c;
|
|
|
539 |
tx_buffer.head = i;
|
|
|
540 |
|
|
|
541 |
// Enable TX ISR - Non atomic, but it will eventually enable TX ISR
|
|
|
542 |
SBI(M_UCSRxB, M_UDRIEx);
|
|
|
543 |
}
|
|
|
544 |
|
|
|
545 |
void MarlinSerial::flushTX(void) {
|
|
|
546 |
// No bytes written, no need to flush. This special case is needed since there's
|
|
|
547 |
// no way to force the TXC (transmit complete) bit to 1 during initialization.
|
|
|
548 |
if (!_written) return;
|
|
|
549 |
|
|
|
550 |
// If global interrupts are disabled (as the result of being called from an ISR)...
|
|
|
551 |
if (!ISRS_ENABLED()) {
|
|
|
552 |
|
|
|
553 |
// Wait until everything was transmitted - We must do polling, as interrupts are disabled
|
|
|
554 |
while (tx_buffer.head != tx_buffer.tail || !TEST(M_UCSRxA, M_TXCx)) {
|
|
|
555 |
|
|
|
556 |
// If there is more space, send an extra character
|
|
|
557 |
if (TEST(M_UCSRxA, M_UDREx))
|
|
|
558 |
_tx_udr_empty_irq();
|
|
|
559 |
|
|
|
560 |
sw_barrier();
|
|
|
561 |
}
|
|
|
562 |
|
|
|
563 |
}
|
|
|
564 |
else {
|
|
|
565 |
// Wait until everything was transmitted
|
|
|
566 |
while (tx_buffer.head != tx_buffer.tail || !TEST(M_UCSRxA, M_TXCx)) sw_barrier();
|
|
|
567 |
}
|
|
|
568 |
|
|
|
569 |
// At this point nothing is queued anymore (DRIE is disabled) and
|
|
|
570 |
// the hardware finished transmission (TXC is set).
|
|
|
571 |
}
|
|
|
572 |
|
|
|
573 |
#else // TX_BUFFER_SIZE == 0
|
|
|
574 |
|
|
|
575 |
void MarlinSerial::write(const uint8_t c) {
|
|
|
576 |
_written = true;
|
|
|
577 |
while (!TEST(M_UCSRxA, M_UDREx)) sw_barrier();
|
|
|
578 |
M_UDRx = c;
|
|
|
579 |
}
|
|
|
580 |
|
|
|
581 |
void MarlinSerial::flushTX(void) {
|
|
|
582 |
// No bytes written, no need to flush. This special case is needed since there's
|
|
|
583 |
// no way to force the TXC (transmit complete) bit to 1 during initialization.
|
|
|
584 |
if (!_written) return;
|
|
|
585 |
|
|
|
586 |
// Wait until everything was transmitted
|
|
|
587 |
while (!TEST(M_UCSRxA, M_TXCx)) sw_barrier();
|
|
|
588 |
|
|
|
589 |
// At this point nothing is queued anymore (DRIE is disabled) and
|
|
|
590 |
// the hardware finished transmission (TXC is set).
|
|
|
591 |
}
|
|
|
592 |
#endif // TX_BUFFER_SIZE == 0
|
|
|
593 |
|
|
|
594 |
/**
|
|
|
595 |
* Imports from print.h
|
|
|
596 |
*/
|
|
|
597 |
|
|
|
598 |
void MarlinSerial::print(char c, int base) {
|
|
|
599 |
print((long)c, base);
|
|
|
600 |
}
|
|
|
601 |
|
|
|
602 |
void MarlinSerial::print(unsigned char b, int base) {
|
|
|
603 |
print((unsigned long)b, base);
|
|
|
604 |
}
|
|
|
605 |
|
|
|
606 |
void MarlinSerial::print(int n, int base) {
|
|
|
607 |
print((long)n, base);
|
|
|
608 |
}
|
|
|
609 |
|
|
|
610 |
void MarlinSerial::print(unsigned int n, int base) {
|
|
|
611 |
print((unsigned long)n, base);
|
|
|
612 |
}
|
|
|
613 |
|
|
|
614 |
void MarlinSerial::print(long n, int base) {
|
|
|
615 |
if (base == 0) write(n);
|
|
|
616 |
else if (base == 10) {
|
|
|
617 |
if (n < 0) { print('-'); n = -n; }
|
|
|
618 |
printNumber(n, 10);
|
|
|
619 |
}
|
|
|
620 |
else
|
|
|
621 |
printNumber(n, base);
|
|
|
622 |
}
|
|
|
623 |
|
|
|
624 |
void MarlinSerial::print(unsigned long n, int base) {
|
|
|
625 |
if (base == 0) write(n);
|
|
|
626 |
else printNumber(n, base);
|
|
|
627 |
}
|
|
|
628 |
|
|
|
629 |
void MarlinSerial::print(double n, int digits) {
|
|
|
630 |
printFloat(n, digits);
|
|
|
631 |
}
|
|
|
632 |
|
|
|
633 |
void MarlinSerial::println(void) {
|
|
|
634 |
print('\r');
|
|
|
635 |
print('\n');
|
|
|
636 |
}
|
|
|
637 |
|
|
|
638 |
void MarlinSerial::println(const String& s) {
|
|
|
639 |
print(s);
|
|
|
640 |
println();
|
|
|
641 |
}
|
|
|
642 |
|
|
|
643 |
void MarlinSerial::println(const char c[]) {
|
|
|
644 |
print(c);
|
|
|
645 |
println();
|
|
|
646 |
}
|
|
|
647 |
|
|
|
648 |
void MarlinSerial::println(char c, int base) {
|
|
|
649 |
print(c, base);
|
|
|
650 |
println();
|
|
|
651 |
}
|
|
|
652 |
|
|
|
653 |
void MarlinSerial::println(unsigned char b, int base) {
|
|
|
654 |
print(b, base);
|
|
|
655 |
println();
|
|
|
656 |
}
|
|
|
657 |
|
|
|
658 |
void MarlinSerial::println(int n, int base) {
|
|
|
659 |
print(n, base);
|
|
|
660 |
println();
|
|
|
661 |
}
|
|
|
662 |
|
|
|
663 |
void MarlinSerial::println(unsigned int n, int base) {
|
|
|
664 |
print(n, base);
|
|
|
665 |
println();
|
|
|
666 |
}
|
|
|
667 |
|
|
|
668 |
void MarlinSerial::println(long n, int base) {
|
|
|
669 |
print(n, base);
|
|
|
670 |
println();
|
|
|
671 |
}
|
|
|
672 |
|
|
|
673 |
void MarlinSerial::println(unsigned long n, int base) {
|
|
|
674 |
print(n, base);
|
|
|
675 |
println();
|
|
|
676 |
}
|
|
|
677 |
|
|
|
678 |
void MarlinSerial::println(double n, int digits) {
|
|
|
679 |
print(n, digits);
|
|
|
680 |
println();
|
|
|
681 |
}
|
|
|
682 |
|
|
|
683 |
// Private Methods
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|
|
684 |
|
|
|
685 |
void MarlinSerial::printNumber(unsigned long n, uint8_t base) {
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|
|
686 |
if (n) {
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|
|
687 |
unsigned char buf[8 * sizeof(long)]; // Enough space for base 2
|
|
|
688 |
int8_t i = 0;
|
|
|
689 |
while (n) {
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|
|
690 |
buf[i++] = n % base;
|
|
|
691 |
n /= base;
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|
|
692 |
}
|
|
|
693 |
while (i--)
|
|
|
694 |
print((char)(buf[i] + (buf[i] < 10 ? '0' : 'A' - 10)));
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|
|
695 |
}
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|
|
696 |
else
|
|
|
697 |
print('0');
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|
|
698 |
}
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|
|
699 |
|
|
|
700 |
void MarlinSerial::printFloat(double number, uint8_t digits) {
|
|
|
701 |
// Handle negative numbers
|
|
|
702 |
if (number < 0.0) {
|
|
|
703 |
print('-');
|
|
|
704 |
number = -number;
|
|
|
705 |
}
|
|
|
706 |
|
|
|
707 |
// Round correctly so that print(1.999, 2) prints as "2.00"
|
|
|
708 |
double rounding = 0.5;
|
|
|
709 |
for (uint8_t i = 0; i < digits; ++i)
|
|
|
710 |
rounding *= 0.1;
|
|
|
711 |
|
|
|
712 |
number += rounding;
|
|
|
713 |
|
|
|
714 |
// Extract the integer part of the number and print it
|
|
|
715 |
unsigned long int_part = (unsigned long)number;
|
|
|
716 |
double remainder = number - (double)int_part;
|
|
|
717 |
print(int_part);
|
|
|
718 |
|
|
|
719 |
// Print the decimal point, but only if there are digits beyond
|
|
|
720 |
if (digits) {
|
|
|
721 |
print('.');
|
|
|
722 |
// Extract digits from the remainder one at a time
|
|
|
723 |
while (digits--) {
|
|
|
724 |
remainder *= 10.0;
|
|
|
725 |
int toPrint = int(remainder);
|
|
|
726 |
print(toPrint);
|
|
|
727 |
remainder -= toPrint;
|
|
|
728 |
}
|
|
|
729 |
}
|
|
|
730 |
}
|
|
|
731 |
|
|
|
732 |
// Preinstantiate
|
|
|
733 |
MarlinSerial customizedSerial;
|
|
|
734 |
|
|
|
735 |
#endif // USE_MARLINSERIAL && (UBRRH || UBRR0H || UBRR1H || UBRR2H || UBRR3H)
|
|
|
736 |
|
|
|
737 |
// For AT90USB targets use the UART for BT interfacing
|
|
|
738 |
#if !USE_MARLINSERIAL && ENABLED(BLUETOOTH)
|
|
|
739 |
HardwareSerial bluetoothSerial;
|
|
|
740 |
#endif
|